Publication No 36706

Author(s)

Kirstädter, A.; Hof, A.; Meyer, W.; Wolf, E.

Title

Implementation of Resilient Packet Ring Nodes Using Network Processors

Keywords

NETWORK PROCESSOR; QOS; SIMULATION

Abstract

Network processors offer a new flexibility for network applications and reduce the time to market for data processing systems. In this paper, we describe the changed development process of the data plane using the Motorola C-5 Network Processor. We implemented a Resilient Packet Ring line card for a SDH cross connect. We show a solution for the support of different Quality of Service classes with a Network Processor and to achieve the necessary system stability. Additionally we carried out some simulations to verify the performance of a fairness algorithm over the ring and the system behavior.

Year

2003

Reference entry

Kirstädter, A.; Hof, A.; Meyer, W.; Wolf, E.
Implementation of Resilient Packet Ring Nodes Using Network Processors
Proceedings of the 28th Annual IEEE Conference on Local Computer Networks (LCN2003) in conjunction with the Workshop on High-Speed Networks, Bonn/Königswinter, October 2003

BibTex file

Download  [BIBTEX]

Full Text

Download  [PDF]